W971GG6KB-25I
IC DRAM 1GBIT PARALLEL 84WBGA
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認證
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服務與包裝
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About After Sales Service
All Parts Extended Quality Guarantee
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例子
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捲帶式
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剪膠帶
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管或託盤
W971GG6KB-25I 數據表
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目前的價格方案正在編制中。請聯絡我們的客戶服務團隊獲取最新的價格資訊。感謝您的理解和支援!
詳細說明
GENERAL DESCRIPTIONThe W971GG6KB is a 1G bits DDR2 SDRAM, organized as 8,388,608 words 8 banks 16 bits. This device achieves high speed transfer rates up to 1066Mb/sec/pin (DDR2-1066) for various applications. W971GG6KB is sorted into the following grade parts: -18, -25, 25I and -3. The -18 grade parts is compliant to the DDR2-1066 (7-7-7) specification. The -25 and 25I grade parts are compliant to the DDR2-800 (5-5-5) or DDR2-800 (6-6-6) specification (the 25I industrial grade which is guaranteed to support -40°C ≤ TCASE ≤ 95°C). The -3 grade parts is compliant to the DDR2-667 (5-5-5) specification.All of the control and address inputs are synchronized with a pair of externally supplied differential clocks. Inputs are latched at the cross point of differential clocks (CLK rising and CLK falling). All I/Os are synchronized with a single ended DQS or differential DQS- DQS pair in a source synchronous fashion.FEATURES● Power Supply: VDD, VDDQ = 1.8 V ± 0.1 V● Double Data Rate architecture: two data transfers per clock cycle● CAS Latency: 3, 4, 5, 6 and 7● Burst Length: 4 and 8● Bi-directional, differential data strobes (DQS and DQS ) are transmitted / received with data● Edge-aligned with Read data and center-aligned with Write data● DLL aligns DQ and DQS transitions with clock● Differential clock inputs (CLK and CLK )● Data masks (DM) for write data● Commands entered on each positive CLK edge, data and data mask are referenced to both edges of DQS● Posted CAS programmable additive latency supported to make command and data bus efficiency● Read Latency = Additive Latency plus CAS Latency (RL = AL + CL)● Off-Chip-Driver impedance adjustment (OCD) and On-Die-Termination (ODT) for better signal quality● Auto-precharge operation for read and write bursts● Auto Refresh and Self Refresh modes● Precharged Power Down and Active Power Down● Write Data Mask● Write Latency = Read Latency - 1 (WL = RL - 1)● Interface: SSTL_18● Packaged in WBGA 84 Ball (8X12.5 mm2), using Lead free materials with RoHS compliant
主要特徵
- Power Supply: VDD, VDDQ = 1.8 V ± 0.1 V
- Double Data Rate architecture: two data transfers per clock cycle
- CAS Latency: 3, 4, 5, 6 and 7
- Burst Length: 4 and 8
- Bi-directional, differential data strobes (DQS and DQS ) are transmitted / received with data
- Edge-aligned with Read data and center-aligned with Write data
- DLL aligns DQ and DQS transitions with clock
- Differential clock inputs (CLK and CLK )
- Data masks (DM) for write data
- Commands entered on each positive CLK edge, data and data mask are referenced to both edges of DQS
- Posted CAS programmable additive latency supported to make command and data bus efficiency
- Read Latency = Additive Latency plus CAS Latency (RL = AL + CL)
- Off-Chip-Driver impedance adjustment (OCD) and On-Die-Termination (ODT) for better signal quality
- Auto-precharge operation for read and write bursts
- Auto Refresh and Self Refresh modes
- Precharged Power Down and Active Power Down
- Write Data Mask
- Write Latency = Read Latency - 1 (WL = RL - 1)
- Interface: SSTL_18
- Packaged in WBGA 84 Ball (8X12.5 mm2), using Lead free materials with RoHS compliant
規格
以下是所選零件的基本參數,涉及零件的特性及其所屬類別。
Category | Integrated Circuits (ICs)MemoryMemory | Mfr | Winbond Electronics |
Series | - | Package | Tape & Reel (TR) |
Product Status | Obsolete | Programmable | Not Verified |
Memory Type ! | Volatile | Memory Format | DRAM |
Technology | SDRAM - DDR2 | Memory Size ! | 1Gbit |
Memory Organization | 64M x 16 | Memory Interface ! | Parallel |
Clock Frequency | 200 MHz | Write Cycle Time - Word, Page | 15ns |
Access Time | 400 ps | Voltage - Supply | 1.7V ~ 1.9V |
Operating Temperature ! | -40°C ~ 95°C (TC) | Mounting Type | Surface Mount |
Package / Case | 84-TFBGA | Supplier Device Package | 84-WBGA (8x12.5) |
Base Product Number | W971GG6 |
Specification Comparison
數據表 PDF
數據表記錄了器件的特性、絕對最大額定值、應用等,這對於作為器件特定應用的整體指南大有裨益。
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