SPC560P44L3
Microcontrollers - MCU 32-bit SPC560P44L3
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製造商零件號 # : SPC560P44L3
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包裝/封裝: QFP100
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製造商: STMicroelectronics
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產品分類 : Microcontrollers
品質保證
品質保證
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認證
我們已成功獲得各項認證標準,並建立了自己的專業檢測實驗室。 這確保了我們向客戶提供的每件產品都符合最高的品質標準。 我們遵守嚴格的測試協議,以保持我們產品的一致性和準確性。 為了確保我們的產品是原裝正品,我們還與信譽良好的第三方檢測機構合作進行嚴格的品質測試。 我們對品質的承諾延伸到滿足行業、法律、監管和 ISO 9001:2015 的要求。
運輸與付款
運輸與付款
關於運送
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關於付款
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信用卡
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西聯匯款
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速匯金
服務與包裝
服務與包裝
About After Sales Service
All Parts Extended Quality Guarantee
自發貨之日起 90 天內發起申請。
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關於包裝
在包裝方面,我們的產品均精心包裝在防靜電袋中,以提供ESD防靜電保護。 外包裝堅固耐用且閉合牢固。 我們支持各種包裝方法,例如捲帶式、切帶式、管式或託盤式。
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例子
![捲帶式](/img/Tape and Reel.png)
捲帶式
![剪膠帶](/img/Cut Tape.png)
剪膠帶
![管或託盤](/img/Tube or Tray.png)
管或託盤
SPC560P44L3 數據表
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目前的價格方案正在編制中。請聯絡我們的客戶服務團隊獲取最新的價格資訊。感謝您的理解和支援!
詳細說明
General descriptionThe MPC5607B is a new family of next generation microcontrollers built on the Power Architecture™ embedded category. This document describes the features of the family and options available within the family members, and highlights important electrical and physical characteristics of the device.The MPC5607B family of 32-bit microcontrollers is the latest achievement in integrated automotive application controllers. It belongs to an expanding family of automotive-focused products designed to address the next wave of body electronics applications within the vehicle. The advanced and cost-efficient host processor core of the MPC5607B automotive controller family complies with the Power Architecture embedded category and only implements the VLE (variable-length encoding) APU (Auxillary Processor Unit), providing improved code density. It operates at speeds of up to 64 MHz and offers high performance processing optimized for low power consumption. It capitalizes on the available development infrastructure of current Power Architecture devices and is supported with software drivers, operating systems and configuration code to assist with users implementations.Features• Single issue, 32-bit CPU core complex (e200z0h) — Compliant with the Power Architecture™ embedded category — Enhanced instruction set allowing variable length encoding (VLE) for code size footprint reduction. With the optional encoding of mixed 16-bit and 32-bit instructions, it is possible to achieve significant code size footprint reduction.• Up to 1.5 Mbytes on-chip Flash supported with the Flash controller• Up to 96 Kbytes on-chip SRAM• Memory protection unit (MPU) with 8 region descriptors and 32-byte region granularity on certain family members• Interrupt controller (INTC) capable of handling 204 selectable-priority interrupt sources• Frequency modulated phase-locked loop (FMPLL)• Crossbar switch architecture for concurrent access to peripherals, Flash, or RAM from multiple bus masters• 16-channel eDMA controller with multiple transfer request sources using DMA multiplexer• Boot assist module (BAM) supports internal Flash programming via a serial link (CAN or SCI)• Timer supports I/O channels providing a range of 16-bit input capture, output compare, and pulse width modulation functions (eMIOS)• 2 analog-to-digital converters (ADC): one 10-bit and one 12-bit• Cross Trigger Unit to enable synchronization of ADC conversions with a timer event from the eMIOS or PIT• Up to 6 serial peripheral interface (DSPI) modules• Up to 10 serial communication interface (LINFlex) modules• Up to 6 enhanced full CAN (FlexCAN) modules with configurable buffers• 1 inter-integrated circuit (I2C) interface module• Up to 149 configurable general purpose pins supporting input and output operations (package dependent)• Real-Time Counter (RTC) — Clock source from internal 128 kHz or 16 MHz oscillator supporting autonomous wakeup with 1 ms resolution with maximum timeout of 2 seconds — Optional support for RTC with clock source from external 32 kHz crystal oscillator, supporting wakeup with 1 sec resolution and maximum timeout of 1 hour• Up to 8 periodic interrupt timers (PIT) with 32-bit counter resolution• Nexus development interface (NDI) per IEEE-ISTO 5001-2003 Class Two Plus• Device/board boundary scan testing supported per Joint Test Action Group (JTAG) of IEEE (IEEE 1149.1)• On-chip voltage regulator (VREG) for regulation of input supply for all internal levels
主要特徵
- Single issue, 32-bit CPU core complex (e200z0h)
- — Compliant with the Power Architecture™ embedded category
- — Enhanced instruction set allowing variable length encoding (VLE) for code size footprint reduction. With the optional encoding of mixed 16-bit and 32-bit instructions, it is possible to achieve significant code size footprint reduction.
- Up to 1.5 Mbytes on-chip Flash supported with the Flash controller
- Up to 96 Kbytes on-chip SRAM
- Memory protection unit (MPU) with 8 region descriptors and 32-byte region granularity on certain family members
- Interrupt controller (INTC) capable of handling 204 selectable-priority interrupt sources
- Frequency modulated phase-locked loop (FMPLL)
- Crossbar switch architecture for concurrent access to peripherals, Flash, or RAM from multiple bus masters
- 16-channel eDMA controller with multiple transfer request sources using DMA multiplexer
- Boot assist module (BAM) supports internal Flash programming via a serial link (CAN or SCI)
- Timer supports I/O channels providing a range of 16-bit input capture, output compare, and pulse width modulation functions (eMIOS)
- 2 analog-to-digital converters (ADC): one 10-bit and one 12-bit
- Cross Trigger Unit to enable synchronization of ADC conversions with a timer event from the eMIOS or PIT
- Up to 6 serial peripheral interface (DSPI) modules
- Up to 10 serial communication interface (LINFlex) modules
- Up to 6 enhanced full CAN (FlexCAN) modules with configurable buffers
- 1 inter-integrated circuit (I2C) interface module
- Up to 149 configurable general purpose pins supporting input and output operations (package dependent)
- Real-Time Counter (RTC)
- — Clock source from internal 128 kHz or 16 MHz oscillator supporting autonomous wakeup with 1 ms resolution with maximum timeout of 2 seconds
- — Optional support for RTC with clock source from external 32 kHz crystal oscillator, supporting wakeup with 1 sec resolution and maximum timeout of 1 hour
- Up to 8 periodic interrupt timers (PIT) with 32-bit counter resolution
- Nexus development interface (NDI) per IEEE-ISTO 5001-2003 Class Two Plus
- Device/board boundary scan testing supported per Joint Test Action Group (JTAG) of IEEE (IEEE 1149.1)
- On-chip voltage regulator (VREG) for regulation of input supply for all internal levels
規格
以下是所選零件的基本參數,涉及零件的特性及其所屬類別。
Manufacturer | Infineon | Product Category ! | Microcontrollers |
數據表 PDF
數據表記錄了器件的特性、絕對最大額定值、應用等,這對於作為器件特定應用的整體指南大有裨益。
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