TPS70745PWP

Name: TPS70745PWP
Rating: 4.5 (10 reviews)

LDO Voltage Regulators 3.3V/1.2V 250/125mA

6,194 有效庫存

TPS70745PWP

有效庫存6,194

LDO Voltage Regulators 3.3V/1.2V 250/125mA

製造商零件號 # : TPS70745PWP
包裝/封裝: HTSSOP-20
零件狀態 : ACTIVE
製造商: Texas Instruments
產品分類 : Voltage Regulators - Linear, Low Drop Out (LDO) Regulators
RoHS:

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例子

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TPS70745PWP 數據表

價格 (USD)

數量	單價	總價
1	$13.014	$13.01
200	$5.037	$1,007.40
500	$4.860	$2,430.00
1000	$4.773	$4,773.00

這些價格會受到市場波動的影響，需要提交報價才能取得最新價格。

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詳細說明

TPS707xx family devices are designed to provide a complete power management solution for the TMS320? DSP family, processor power, ASIC, FPGA, and digital applications where dual output voltage regulators are required. Easy programmability of the sequencing function makes the TPS707xx family ideal for any TMS320 DSP applications with power sequencing requirements. Differentiated features, such as accuracy, fast transient response, SVS supervisory circuit, manual reset inputs, and an enable function, provide a complete system solution.

The TPS707xx family of voltage regulators offer very low dropout voltage and dual outputs with power-up sequence control, which is designed primarily for DSP applications. These devices have extremely low noise output performance without using any added filter bypass capacitors and are designed to have a fast transient response and be stable with 10μF low ESR capacitors.

These devices have fixed 3.3V/2.5V, 3.3V/1.8V, 3.3V/1.5V, 3.3V/1.2V, and adjustable/adjustable voltage options. Regulator 1 can support up to 250mA, and regulator 2 can support up to 125mA. Separate voltage inputs allow the designer to configure the source power.

Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 83mV on regulator 1) and is directly proportional to the output current. Additionally, because the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (maximum of 230μA over the full range of output current). This LDO family also features a sleep mode; applying a high signal to EN (enable) shuts down both regulators, reducing the input current to 1μA at T_J = +25°C.

The device is enabled when the EN pin is connected to a low-level input voltage. The output voltages of the two regulators are sensed at the V_SENSE1 and V_SENSE2 pins, respectively.

The input signal at the SEQ pin controls the power-up sequence of the two regulators. When the device is enabled and the SEQ terminal is pulled high or left open, V_OUT2 turns on first and V_OUT1 remains off until V_OUT2 reaches approximately 83% of its regulated output voltage. At that time V_OUT1 is turned on. If V_OUT2 is pulled below 83% (for example, an overload condition), V_OUT1 is turned off. Pulling the SEQ terminal low reverses the power-up order and V_OUT1 is turned on first. The SEQ pin is connected to an internal pull-up current source.

For each regulator, there is an internal discharge transistor to discharge the output capacitor when the regulator is turned off (disabled).

The PG1 pin reports the voltage conditions at V_OUT1, which can be used to implement an SVS for the circuitry supplied by regulator 1.

The TPS707xx features a RESET (SVS, POR, or Power-On Reset). RESET output initiates a reset in DSP systems and related digital applications in the event of an undervoltage condition. RESET indicates the status of V_OUT2 and both manual reset pins (MR1 and MR2). When V_OUT2 reaches 95% of its regulated voltage and MR1 and MR2 are in the logic high state, RESET goes to a high impedance state after a 120ms delay. RESET goes to the logic low state when the V_OUT2 regulated output voltage is pulled below 95% (for example, an overload condition) of its regulated voltage. To monitor V_OUT1, the PG1 output pin can be connected to MR1 or MR2.

The device has an undervoltage lockout (UVLO) circuit that prevents the internal regulators from turning on until V_IN1 reaches 2.5V.

主要特徵

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Fault-Tolerant Load Balancing
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規格

以下是所選零件的基本參數，涉及零件的特性及其所屬類別。

Product Status	Active	Output Configuration	Positive
Output Type	Fixed	Voltage - Input (Max)	6V
Voltage - Output (Min/Fixed)	3.3V, 1.2V	Voltage Dropout (Max)	0.14V @ 250mA, -
Current - Output	250mA, 125mA	Current - Quiescent (Iq)	230 µA
PSRR	60dB (1kHz)	Control Features	Enable, Power Good, Reset, Sequencing
Protection Features	Over Current, Over Temperature, Reverse Polarity, Under Voltage Lockout (UVLO)	Operating Temperature !	-40°C ~ 125°C
Mounting Type	Surface Mount	Package / Case	HTSSOP-20
Supplier Device Package	20-HTSSOP	Base Product Number	TPS70745
Manufacturer	Texas Instruments	Product Category !	LDO Voltage Regulators
RoHS	Details	Mounting Style	SMD/SMT
Output Voltage	1.2 V, 3.3 V	Output Current !	250 mA
Number of Outputs	2 Output	Polarity	Positive
Quiescent Current !	230 uA	Input Voltage, Min	2.7 V
Input Voltage, Max	6 V	Minimum Operating Temperature	- 40 C
Maximum Operating Temperature !	+ 125 C	Dropout Voltage !	83 mV
Series	TPS70745	Brand	Texas Instruments
Dropout Voltage - Max	275 mV	Height	1.15 mm
Ib - Input Bias Current	190 uA	Length	6.5 mm
Line Regulation !	0.01 %	Load Regulation !	1 mV
Moisture Sensitive	Yes	Operating Supply Current	190 uA
Operating Temperature Range !	- 4	Pd - Power Dissipation	4.115 W
Product Type !	LDO Voltage Regulators	Reference Voltage !	1.22 V
Factory Pack Quantity	70	Subcategory	PMIC - Power Management ICs
Voltage Regulation Accuracy	2 %	Width	4.4 mm
Unit Weight	0.002885 oz

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TPS70745PWP

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TPS70745PWP

TPS70745PWP

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