SAA7715AH
A cutting-edge processor optimized for high-quality audio processingSAA7715AH
A cutting-edge processor optimized for high-quality audio processing
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製造商零件號 # : SAA7715AH
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包裝/封裝: QFP
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製造商: NXP SEMICONDUCTORS
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產品分類 : Analog to Digital Converters (ADC)
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SAA7715AH 數據表
目前的價格方案正在編制中。請聯絡我們的客戶服務團隊獲取最新的價格資訊。感謝您的理解和支援!
詳細說明
GENERAL DESCRIPTIONThe SAA7715 is a cost effective and powerful high performance 24-bit programmable DSP for a variety of digital audio applications. This DSP device integrates a 24-bit DSP core with programmable memories (program RAM/ROM, data and coefficient RAM), 4 digital serial inputs, 4 digital serial outputs, 2 separate SPDIF receivers, a stereo FSDAC, a standard Philips I2C-bus interface, a phase-locked loop for the DSP clock generation and a second phase-locked loop for system clock generation (internal and external DAC clocks).FEATURESHardware• 24-bit Philips 70 MIPS DSP core (24-bit data path and 12/24-bit coefficient path)• 1.5 kbyte of downloadable DSP program memory (PRAM)• 2 kbyte of DSP program memory (PROM)• 2.5 kbyte of re-programmable DSP data memory (XRAM)• 512 byte of re-programmable DSP coefficient memory (YRAM)• Four stereo digital serial inputs (8 channels) with common BCK and WS. To these inputs the I2S-bus format or LSB-justified formats can be applied• One stereo bitstream DAC (2 channels) with 64 fold oversampling and noise shaping• Selectable clock output (pin SYSCLK) for external slave devices (512fs to 128fs)• Four stereo digital serial outputs (8 channels) with selectable I2S-bus or LSB-justified format• Two SPDIF inputs combined with digital serial input• On-board WS_PLL generates clock for on-board DAC and output pin SYSCLK• I2C-bus controlled (including fast mode)• Programmable Phase-Locked Loop (PLL) derives the clock for the DSP from the CLK_IN input• −40 to +85 °C operating temperature range• supply voltage only 3.3 V• All digital inputs are tolerant for 5 V input levels• Power-down mode for low current consumption in standby mode• Optimized pinning for applications with other Philips DACs (such as UDA1334, UDA1355 and UDA1328).(Continue ...)APPLICATIONS• As co-processor for a car radio DSP in a car radio application for additional acoustic enhancements (sound steering/sound elevation/signal processing)• Multichannel audio: in DVD and Home theatre applications as post-processing device like signal virtualisation (virtual 3D surround) and acoustic enhancement, tone control, volume control and equalizers• Multichannel decoding: Dolby Pro Logic and virtual 3D surround• PC/USB audio applications: stereo widening (Incredible surround), sound steering, sound positioning and speaker equalization.
主要特徵
- Hardware
- 24-bit Philips 70 MIPS DSP core (24-bit data path and 12/24-bit coefficient path)
- 1.5 kbyte of downloadable DSP program memory (PRAM)
- 2 kbyte of DSP program memory (PROM)
- 2.5 kbyte of re-programmable DSP data memory (XRAM)
- 512 byte of re-programmable DSP coefficient memory (YRAM)
- Four stereo digital serial inputs (8 channels) with common BCK and WS. To these inputs the I2S-bus format or LSB-justified formats can be applied
- One stereo bitstream DAC (2 channels) with 64 fold oversampling and noise shaping
- Selectable clock output (pin SYSCLK) for external slave devices (512fs to 128fs)
- Four stereo digital serial outputs (8 channels) with selectable I2S-bus or LSB-justified format
- Two SPDIF inputs combined with digital serial input
- On-board WS_PLL generates clock for on-board DAC and output pin SYSCLK
- I2C-bus controlled (including fast mode)
- Programmable Phase-Locked Loop (PLL) derives the clock for the DSP from the CLK_IN input
- −40 to +85 °C operating temperature range
- supply voltage only 3.3 V
- All digital inputs are tolerant for 5 V input levels
- Power-down mode for low current consumption in standby mode
- Optimized pinning for applications with other Philips DACs (such as UDA1334, UDA1355 and UDA1328).
- (Continue ...)
規格
以下是所選零件的基本參數,涉及零件的特性及其所屬類別。
Rohs Code | Yes | Part Life Cycle Code | Transferred |
Reach Compliance Code | HTS Code ! | 8542.31.00.01 | |
Bit Size | 24 | Format | FIXED POINT |
JESD-30 Code | S-PQFP-G44 | JESD-609 Code | e3 |
Number of Terminals | 44 | Operating Temperature-Max | 85 °C |
Operating Temperature-Min | -40 °C | Package Body Material | PLASTIC/EPOXY |
Package Code | QFP | Package Equivalence Code | QFP44,.5SQ,32 |
Package Shape | SQUARE | Package Style | FLATPACK |
Power Supplies ! | 3.3 V | Qualification Status ! | Not Qualified |
Supply Voltage-Nom | 3.3 V | Surface Mount ! | YES |
Technology | CMOS | Temperature Grade ! | INDUSTRIAL |
Terminal Finish | Matte Tin (Sn) | Terminal Form ! | GULL WING |
Terminal Pitch ! | 0.8 mm | Terminal Position | QUAD |
數據表 PDF
數據表記錄了器件的特性、絕對最大額定值、應用等,這對於作為器件特定應用的整體指南大有裨益。
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