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SAA7117AH
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服務與包裝
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例子
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管或託盤
SAA7117AH 數據表
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詳細說明
GENERAL DESCRIPTIONThe one chip front-end SAA7110; SAA7110A is a digital multistandard colour decoder (OCF1) on the basis of the DIG-TV2 system with two integrated Analog-to-Digital Converters (ADCs), a Clock Generation Circuit (CGC) and Brightness Contrast Saturation (BCS) control.FEATURES• Six analog inputs (6 × CVBS or 3 × Y/C or combinations)• Three analog processing channels• Three built-in analog anti-aliasing filters• Analog signal adding of two channels• Two 8-bit video CMOS analog-to-digital converters• Fully programmable static gain for the main channels or automatic gain control for the selected CVBS/Y channel• Selectable white peak control signal• Luminance and chrominance signal processing for PAL B/G, NTSC M and SECAM• Full range HUE control• Automatic detection of 50/60 Hz field frequency, and automatic switching between standards PAL and NTSC, SECAM forceable• Horizontal and vertical sync detection for all standards• Cross-colour reduction by chrominance comb filtering for NTSC or special cross-colour cancellation for SECAM• UV signal delay lines for PAL to correct chrominance phase errors• The YUV-bus supports a data rate of: – 780 × fh = 12.2727 MHz for 60 Hz (NTSC) – 944 × fh = 14.75 MHz for 50 Hz (PAL/SECAM)• Square pixel format with 768/640 active samples per line on the YUV-bus• CCIR 601 level compatible• 4 : 2 : 2 and 4 : 1 : 1 YUV output formats in 8-bit resolution• User programmable luminance peaking for aperture correction• Compatible with memory-based features (line-locked clock, square pixel)• Requires only one crystal (26.8 MHz) for all standards• Real time status information output (RTCO)• Brightness Contrast Saturation (BCS) control for the YUV-bus• Negation of picture possible• One user programmable general purpose switch on an output pin• Switchable between on-chip Clock Generation Circuit (CGC) and external CGC (SAA7197)• Power-on control• I2C-bus controlled.APPLICATIONS• Desktop video• Multimedia• Digital television• Image processing• Video phone• Video picture grabbing.
主要特徵
- Six analog inputs (6 × CVBS or 3 × Y/C or combinations)
- Three analog processing channels
- Three built-in analog anti-aliasing filters
- Analog signal adding of two channels
- Two 8-bit video CMOS analog-to-digital converters
- Fully programmable static gain for the main channels or automatic gain control for the selected CVBS/Y channel
- Selectable white peak control signal
- Luminance and chrominance signal processing for PAL B/G, NTSC M and SECAM
- Full range HUE control
- Automatic detection of 50/60 Hz field frequency, and automatic switching between standards PAL and NTSC, SECAM forceable
- Horizontal and vertical sync detection for all standards
- Cross-colour reduction by chrominance comb filtering for NTSC or special cross-colour cancellation for SECAM
- UV signal delay lines for PAL to correct chrominance phase errors
- The YUV-bus supports a data rate of: – 780 × fh = 12.2727 MHz for 60 Hz (NTSC) – 944 × fh = 14.75 MHz for 50 Hz (PAL/SECAM)
- Square pixel format with 768/640 active samples per line on the YUV-bus
- CCIR 601 level compatible
- 4 : 2 : 2 and 4 : 1 : 1 YUV output formats in 8-bit resolution
- User programmable luminance peaking for aperture correction
- Compatible with memory-based features (line-locked clock, square pixel)
- Requires only one crystal (26.8 MHz) for all standards
- Real time status information output (RTCO)
- Brightness Contrast Saturation (BCS) control for the YUV-bus
- Negation of picture possible
- One user programmable general purpose switch on an output pin
- Switchable between on-chip Clock Generation Circuit (CGC) and external CGC (SAA7197)
- Power-on control
- I2C-bus controlled.
規格
以下是所選零件的基本參數，涉及零件的特性及其所屬類別。
| Manufacturer | NXP Semiconductors | Product Category ! | IC Chips |
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