MC9S12E128CPV

有效庫存7,362

25MHz processing speed

  • 製造商零件號 # : MC9S12E128CPV

  • 包裝/封裝: LQFP-112

  • 製造商: FREESCALE

  • 產品分類 : Microcontrollers

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MC9S12E128CPV 數據表

價格 (USD)

數量 單價 總價
1 $16.484 $16.48
200 $6.380 $1,276.00
500 $6.156 $3,078.00
1000 $6.045 $6,045.00

這些價格會受到市場波動的影響,需要提交報價才能取得最新價格。

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詳細說明

IntroductionOverviewThe MC9S12E-Family is a 112/80 pin low cost general purpose MCU family. All members of the MC9S12E-Family are comprised of standard on-chip peripherals including a 16-bit central processing unit (HCS12 CPU), up to 256K bytes of Flash EEPROM, up to 16K bytes of RAM, three asynchronous serial communications interface modules (SCI), a serial peripheral interface (SPI), an Inter-IC Bus (IIC), three 4-channel 16-bit timer modules (TIM), a 6-channel 15-bit Pulse Modulator with Fault protection module (PMF), a 6-channel 8-bit Pulse Width Modulator (PWM), a 16-channel 10-bit analog-to-digital converter (ADC), and two 1-channel 8-bit digital-to-analog converters (DAC). The MC9S12E-Family has full 16-bit data paths throughout. The inclusion of a PLL circuit allows power consumption and performance to be adjusted to suit operational requirements. In addition to the I/O ports available on each module, 16 dedicated I/O port bits are available with Wake-Up capability from STOP or WAIT mode. Furthermore, an on chip bandgap based voltage regulator (VREG) generates the internal digital supply voltage of 2.5V (VDD) from a 3.135V to 5.5V external supply range.Features• 16-bit HCS12 CORE – HCS12 CPU i. Upward compatible with M68HC11 instruction set ii. Interrupt stacking and programmer’s model identical to M68HC11 iii. Instruction queue iv. Enhanced indexed addressing – Module Mapping Control (MMC) – Interrupt Control (INT) – Background Debug Module (BDM) – Debugger (DBG12) including breakpoints and change-of-flow trace buffer – Multiplexed External Bus Interface (MEBI)• Wake-Up interrupt inputs – Up to 16 port bits available for wake up interrupt function with digital filtering• Memory options – 32K, 64K, 128K or 256K Byte Flash EEPROM – 2K, 4K, 8K or 16K Byte RAM• Two 1-channel Digital-to-Analog Converters (DAC) – 8-bit resolution• Analog-to-Digital Converter (ADC) – 16-channel module with 10-bit resolution – External conversion trigger capability• Three 4-channel Timers (TIM) – Programmable input capture or output compare channels – Simple PWM mode – Counter Modulo Reset – External Event Counting – Gated Time Accumulation• 6 PWM channels (PWM) – Programmable period and duty cycle – 8-bit 6-channel or 16-bit 3-channel – Separate control for each pulse width and duty cycle – Center-aligned or left-aligned outputs – Programmable clock select logic with a wide range of frequencies – Fast emergency shutdown input• 6-channel Pulse width Modulator with Fault protection (PMF) – Three independent 15-bit counters with synchronous mode – Complementary channel operation – Edge and center aligned PWM signals – Programmable dead time insertion – Integral reload rates from 1 to 16 – Four fault protection shut down input pins – Three current sense input pins• Serial interfaces – Three asynchronous serial communication interfaces (SCI) – Synchronous serial peripheral interface (SPI) – Inter-IC Bus (IIC)• Clock and Reset Generator (CRG) – Windowed COP watchdog – Real Time interrupt – Clock Monitor – Pierce or low current Colpitts oscillator – Phase-locked loop clock frequency multiplier – Self Clock mode in absence of external clock – Low power 0.5 to 16Mhz crystal oscillator reference clock• Operating frequency – 50MHz equivalent to 25MHz Bus Speed• Internal 2.5V Regulator – Input voltage range from 3.135V to 5.5V – Low power mode capability – Includes low voltage reset (LVR) circuitry – Includes low voltage interrupt (LVI) circuitry• 112-Pin LQFP or 80-Pin QFP package – Up to 90 I/O lines with 5V input and drive capability (112 pin package) – Up to two dedicated 5V input only lines (IRQ and XIRQ) – Sixteen 3.3V/5V A/D converter inputs• Development Support. – Single-wire background debugTM mode – On-chip hardware breakpoints – Enhanced debug features

主要特徵

  • 16-bit HCS12 CORE
  • — HCS12 CPU
  • – i. Upward compatible with M68HC11 instruction set
  • – ii. Interrupt stacking and programmer’s model identical to M68HC11
  • – iii. Instruction queue
  • – iv. Enhanced indexed addressing
  • — Module Mapping Control (MMC)
  • — Interrupt control (INT)
  • — Background Debug Module (BDM)
  • — Debugger (DBG12) including breakpoints and change-of-flow trace buffer
  • — Multiplexed External Bus Interface (MEBI)
  • Wake-Up interrupt inputs
  • — Up to 16 port bits available for wake up interrupt function with digital filtering
  • Memory Options
  • — 32K, 64K or 128K Byte Flash EEPROM
  • — 2K, 4K or 8K Byte RAM
  • Two 1-channel Digital-to-Analog Converters (DAC)
  • — 8-bit resolution
  • Analog-to-Digital Converter (ADC)
  • — 16-channel module with 10-bit resolution
  • — External conversion trigger capability
  • Three 4-channel Timers (TIM)
  • — Programmable input capture or output compare channels
  • — Simple PWM mode
  • — Counter modulo reset
  • — External event counting
  • — Gated time accumulation
  • 6 PWM channels (PWM)
  • — Programmable period and duty cycle
  • — 8-bit 6-channel or 16-bit 3-channel
  • — Separate control for each pulse width and duty cycle
  • — Center-aligned or left-aligned outputs
  • — Programmable clock select logic with a wide range of frequencies
  • — Fast emergency shutdown input
  • 6-channel Pulse width Modulator with Fault protection (PMF)
  • — Three independent 15-bit counters with synchronous mode
  • — Complementary channel operation
  • — Edge and center aligned PWM signals
  • — Programmable dead time insertion
  • — Integral reload rates from 1 to 16
  • — Four fault protection shut down input pins
  • — Three current sense input pins
  • Serial interfaces
  • — Three asynchronous serial communication interfaces (SCI)
  • — Synchronous serial peripheral interface (SPI)
  • — Inter-IC Bus (IIC)
  • Clock and Reset Generator (CRG)
  • — Windowed COP watchdog
  • — Real Time interrupt
  • — Clock Monitor
  • — Pierce or low current Colpitts oscillator
  • — Phase-locked loop clock frequency multiplier
  • — Self Clock mode in absence of external clock
  • — Low power 0.5 to 16Mhz crystal oscillator reference clock
  • Operating frequency
  • — 50MHz equivalent to 25MHz Bus Speed
  • Internal 2.5V Regulator
  • — Input voltage range from 3.135V to 5.5V
  • — Low power mode capability
  • — Includes low voltage reset (LVR) circuitry
  • — Includes low voltage interrupt (LVI) circuitry
  • 112-Pin LQFP or 80-Pin QFP or 64-Pin QFN package
  • — Up to 90 I/O lines with 5V input and drive capability (112 pin package)
  • — Up to two dedicated 5V input only lines (IRQ and XIRQ)
  • — Sixteen 3.3V/5V A/D converter inputs
  • Development Support.
  • — Single-wire background debugTM mode
  • — On-chip hardware breakpoints
  • — Enhanced debug features

規格

以下是所選零件的基本參數,涉及零件的特性及其所屬類別。

Part Life Cycle Code Active Part Package Code QFP
Pin Count ! 112 Reach Compliance Code
Has ADC YES Address Bus Width ! 16
Bit Size 16 Clock Frequency-Max 16 MHz
DAC Channels YES DMA Channels NO
External Data Bus Width 16 JESD-30 Code S-PQFP-G112
Length 20 mm Number of I/O Lines 92
Number of Terminals 112 Operating Temperature-Max 85 °C
Operating Temperature-Min -40 °C PWM Channels YES
Package Body Material PLASTIC/EPOXY Package Code LQFP
Package Shape SQUARE Package Style FLATPACK, LOW PROFILE
ROM Programmability FLASH Seated Height-Max 1.6 mm
Speed 25 MHz Supply Voltage-Max 2.75 V
Supply Voltage-Min 2.35 V Supply Voltage-Nom 2.5 V
Surface Mount ! YES Technology CMOS
Temperature Grade ! INDUSTRIAL Terminal Form ! GULL WING
Terminal Pitch ! 0.65 mm Terminal Position QUAD
Width 20 mm uPs/uCs/Peripheral ICs Type MICROCONTROLLER

數據表 PDF

數據表記錄了器件的特性、絕對最大額定值、應用等,這對於作為器件特定應用的整體指南大有裨益。

初步規格 MC9S12E128CPV PDF 下載

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