CY7C68013-128AC
CMOS microcontroller with 48MHz frequency
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製造商零件號 # : CY7C68013-128AC
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包裝/封裝: QFP-128L
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製造商: CYPRESS
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產品分類 : Memory
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CY7C68013-128AC 數據表
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詳細說明
Cypress’s EZ-USB FX2 is the world’s first USB 2.0 integrated microcontroller. By integrating the USB 2.0 transceiver, SIE, enhanced 8051 microcontroller, and a programmable peripheral interface in a single chip, Cypress has created a very cost-effective solution that provides superior time-to-market advantages. The ingenious architecture of FX2 results in data transfer rates of 56 Mbytes per second, the maximum allowable USB 2.0 bandwidth, while still using a low cost 8051 microcontroller in a package as small as a 56 SSOP. Because it incorporates the USB 2.0 transceiver, the FX2 is more economical, providing a smaller footprint solution than USB 2.0 SIE or external transceiver implementations. With EZ-USB FX2, the Cypress Smart SIE handles most of the USB 1.1 and 2.0 protocol in hardware, freeing the embedded micro controller for application-specific functions and decreasing development time to ensure USB compatibility. The General Programmable Interface (GPIF) and Master/Slave Endpoint FIFO (8- or 16-bit data bus) provides an easy and glueless interface to popular interfaces such as ATA, UTOPIA, EPP, PCMCIA, and most DSP/processors.EZ-USB FX2™ Features • Single-chip integrated USB 2.0 Transceiver, SIE, and Enhanced 8051 Microprocessor • Software: 8051 code runs from: — Internal RAM, which is downloaded via USB — Internal RAM, which is loaded from EEPROM — External memory device (128 pin package • Four programmable BULK/INTERRUPT/ISOCHRONOUS endpoints — Buffering options: double, triple and quad • 8- or 16-bit external data interface • GPIF — Allows direct connection to most parallel interface — Programmable waveform descriptors and configuration registers to define waveforms — Supports multiple Ready (RDY) inputs and Control (CTL) outputs • Integrated, industry standard enhanced 8051: — Up to 48-MHz clock rate — Four clocks per instruction cycle — Two USARTS — Three counter/timers — Expanded interrupt system — Two data pointers • Supports bus-powered applications by using renumeration • 3.3V operation • Smart Serial Interface Engine • Vectored USB interrupts • Separate data buffers for the SETUP and DATA portions of a CONTROL transfer • Integrated I2C-compatible controller, runs at 100 or 400 kHz • 48-MHz, 24-MHz, or 12-MHz 8051 operation • Four integrated FIFOs — Brings glue and FIFOs inside for lower system cost — Automatic conversion to and from 16-bit buses — Master or slave operation — FIFOs can use externally supplied clock or asyn chronous strobes — Easy interface to ASIC and DSP ICs • Special autovectors for FIFO and GPIF interrupts • Up to 40 general-purpose I/Os • Four package options—128-pin TQFP, 100-pin TQFP, 56-pin QFN and 56-pin SSOP • Four packages are defined for the family: 56 SSOP, 56 QFN, 100 TQFP, and 128 TQFPApplications • DSL modems • ATA interface • Memory card readers • Legacy conversion devices • Cameras • Scanners • Home PNA • Wireless LAN • MP3 players • Networking.
主要特徵
- Single-chip integrated USB 2.0 Transceiver, SIE, and Enhanced 8051 Microprocessor
- Software: 8051 code runs from:
- — Internal RAM, which is downloaded via USB
- — Internal RAM, which is loaded from EEPROM
- — External memory device (128 pin package
- Four programmable BULK/INTERRUPT/ISOCHRONOUS endpoints
- — Buffering options: double, triple and quad
- 8- or 16-bit external data interface
- GPIF
- — Allows direct connection to most parallel interface
- — Programmable waveform descriptors and configuration registers to define waveforms
- — Supports multiple Ready (RDY) inputs and Control (CTL) outputs
- Integrated, industry standard enhanced 8051:
- — Up to 48-MHz clock rate
- — Four clocks per instruction cycle
- — Two USARTS
- — Three counter/timers
- — Expanded interrupt system
- — Two data pointers
- Supports bus-powered applications by using renumeration
- 3.3V operation
- Smart Serial Interface Engine
- Vectored USB interrupts
- Separate data buffers for the SETUP and DATA portions of a CONTROL transfer
- Integrated I2C-compatible controller, runs at 100 or 400 kHz
- 48-MHz, 24-MHz, or 12-MHz 8051 operation
- Four integrated FIFOs
- — Brings glue and FIFOs inside for lower system cost
- — Automatic conversion to and from 16-bit buses
- — Master or slave operation
- — FIFOs can use externally supplied clock or asyn chronous strobes
- — Easy interface to ASIC and DSP ICs
- Special autovectors for FIFO and GPIF interrupts
- Up to 40 general-purpose I/Os
- Four package options—128-pin TQFP, 100-pin TQFP, 56-pin QFN and 56-pin SSOP
- Four packages are defined for the family: 56 SSOP, 56 QFN, 100 TQFP, and 128 TQFP
規格
以下是所選零件的基本參數,涉及零件的特性及其所屬類別。
Rohs Code | No | Part Life Cycle Code | Obsolete |
Part Package Code | QFP | Pin Count ! | 128 |
Reach Compliance Code | not_compliant | HTS Code ! | 8542.31.00.01 |
Has ADC | NO | Address Bus Width ! | 16 |
Bit Size | 8 | CPU Family | 8051 |
Clock Frequency-Max | 24 MHz | DAC Channels | NO |
DMA Channels | NO | External Data Bus Width | 8 |
JESD-30 Code | R-PQFP-G128 | JESD-609 Code | e0 |
Length | 20 mm | Moisture Sensitivity Level | 3 |
Number of I/O Lines | 40 | Number of Terminals | 128 |
Operating Temperature-Max | 70 °C | Operating Temperature-Min | |
PWM Channels | NO | Package Body Material | PLASTIC/EPOXY |
Package Code | LQFP | Package Equivalence Code | QFP128,.63X.87,20 |
Package Shape | RECTANGULAR | Package Style | FLATPACK, LOW PROFILE |
Power Supplies ! | 3.3 V | Qualification Status ! | Not Qualified |
RAM (bytes) | 8196 | ROM Programmability | EEPROM |
Seated Height-Max | 1.6 mm | Speed | 48 MHz |
Supply Current-Max | 260 mA | Supply Voltage-Max | 3.6 V |
Supply Voltage-Min | 3 V | Supply Voltage-Nom | 3.3 V |
Surface Mount ! | YES | Technology | CMOS |
Temperature Grade ! | COMMERCIAL | Terminal Finish | TIN LEAD |
Terminal Form ! | GULL WING | Terminal Pitch ! | 0.65 mm |
Terminal Position | QUAD | Width | 14 mm |
uPs/uCs/Peripheral ICs Type | MICROCONTROLLER |
Specification Comparison
數據表 PDF
數據表記錄了器件的特性、絕對最大額定值、應用等,這對於作為器件特定應用的整體指南大有裨益。
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