AGL125V2-VQG100I

Name: AGL125V2-VQG100I
Rating: 4.5 (10 reviews)

Utilizes 130nm technology

6,513 有效庫存

AGL125V2-VQG100I

有效庫存6,513

Utilizes 130nm technology

製造商零件號 # : AGL125V2-VQG100I
包裝/封裝: IC FPGA IGLOO 1.2-1.5V 100VQFP
製造商: MICROSEMI
產品分類 : FPGAs (Field Programmable Gate Array)

品質保證

從我們的供應鍊網路採購的所有零件都經過嚴格的進貨檢驗流程。這種細緻的檢查可確保客戶收到的零件是正品並符合要求的標準。此外，我們還保存這些檢查的詳細記錄，以確保整個供應鏈的透明度和可追溯性。

認證

我們已成功獲得各項認證標準，並建立了自己的專業檢測實驗室。這確保了我們向客戶提供的每件產品都符合最高的品質標準。我們遵守嚴格的測試協議，以保持我們產品的一致性和準確性。為了確保我們的產品是原裝正品，我們還與信譽良好的第三方檢測機構合作進行嚴格的品質測試。我們對品質的承諾延伸到滿足行業、法律、監管和 ISO 9001:2015 的要求。

運輸與付款

關於運送

我們通常會在幾個工作日內通過可靠的運輸公司（例如 FedEx、SF、UPS 或 DHL）運送訂單。我們還支持其他運輸方式。如果您想詢問具體的運輸細節或費用，請隨時與我們聯繫。

關於付款

我們接受多種支付方式，包括VISA、MasterCard、銀聯、西聯、PayPal等渠道。

如果您有特定的付款方式或想詢問費率和其他詳細信息，請隨時與我們聯繫。

電匯

Paypal

信用卡

西聯匯款

速匯金

服務與包裝

About After Sales Service

All Parts Extended Quality Guarantee

自發貨之日起 90 天內發起申請。

與我們的工作人員確認退貨或換貨。

保持貨物收到時的原始狀態。

最後請注意，退貨或換貨的資格取決於對退貨商品實際狀況的評估。在完成退貨或換貨流程之前，我們將評估收到的貨物。如果您對退貨或換貨有任何疑問或需要進一步幫助，請隨時通過以下方式聯絡我們： [email protected]

關於包裝

在包裝方面，我們的產品均精心包裝在防靜電袋中，以提供ESD防靜電保護。外包裝堅固耐用且閉合牢固。我們支持各種包裝方法，例如捲帶式、切帶式、管式或託盤式。

例子

捲帶式

剪膠帶

管或託盤

AGL125V2-VQG100I 數據表

目前的價格方案正在編制中。請聯絡我們的客戶服務團隊獲取最新的價格資訊。感謝您的理解和支援!

快速報價

請提交詢價 AGL125V2-VQG100I 或發送電子郵件給我們： Email: [email protected], 我們將在 12 小時內與您聯繫。

數量^*

聯絡人^*

郵箱^*

公司名稱

還要別的嗎？

詳細說明

At the heart of the AGL125V2-VQG100I lies a commitment to cutting-edge technology and innovative design. This industrial gas turbine engine is engineered to deliver maximum power output of 125 megawatts while prioritizing fuel efficiency, emissions reduction, and extended maintenance intervals. With its sophisticated control system and seamless integration capabilities, the AGL125V2-VQG100I is a versatile and reliable choice for industries across the board. Its ability to withstand extreme operating conditions and its adherence to rigorous safety and environmental standards make it an ideal solution for power generation in oil and gas, utilities, and manufacturing sectors

主要特徵

Low Power
1.2 V to 1.5 V Core Voltage Support for Low Power
Supports Single-Voltage System Operation
5 µW Power Consumption in FlashFreeze Mode
Low Power Active FPGA Operation
FlashFreeze Technology Enables Ultra-Low Power Consumption while Maintaining FPGA Content
Easy Entry to / Exit from Ultra-Low Power FlashFreeze Mode
High Capacity
15K to 1 Million System Gates
Up to 144 Kbits of True Dual-Port SRAM
Up to 300 User I/Os
Reprogrammable Flash Technology
130-nm, 7-Layer Metal, Flash-Based CMOS Process
Instant On Level 0 Support
Single-Chip Solution
Retains Programmed Design When Powered Off
250 MHz (1.5 V systems) and 160 MHz (1.2 V systems) System Performance
In-System Programming (ISP) and Security
ISP Using On-Chip 128-Bit Advanced Encryption Standard (AES) Decryption (except ARM®-enabled IGLOO® devices) via JTAG (IEEE 1532–compliant)†
FlashLock® Designed to Secure FPGA Contents
High-Performance Routing Hierarchy
Segmented, Hierarchical Routing and Clock Structure
Advanced I/O
700 Mbps DDR, LVDS-Capable I/Os (AGL250 and above)
1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V Mixed-Voltage Operation
Bank-Selectable I/O Voltages—up to 4 Banks per Chip
Single-Ended I/O Standards: LVTTL, LVCMOS 3.3 V / 2.5 V / 1.8 V / 1.5 V / 1.2 V, 3.3 V PCI / 3.3 V PCI-X†, and LVCMOS 2.5 V / 5.0 V Input†
Differential I/O Standards: LVPECL, LVDS, B-LVDS, and MLVDS (AGL250 and above)
Wide Range Power Supply Voltage Support per JESD8-B, Allowing I/Os to Operate from 2.7 V to 3.6 V
Wide Range Power Supply Voltage Support per JESD8-12, Allowing I/Os to Operate from 1.14 V to 1.575 V
I/O Registers on Input, Output, and Enable Paths
Hot-Swappable and Cold-Sparing I/Os‡
Programmable Output Slew Rate† and Drive Strength
Weak Pull-Up/-Down
IEEE 1149.1 (JTAG) Boundary Scan Test
Pin-Compatible Packages across the IGLOO Family
Clock Conditioning Circuit (CCC) and PLL†
Six CCC Blocks, One with an Integrated PLL
Configurable Phase Shift, Multiply/Divide, Delay Capabilities, and External Feedback
Wide Input Frequency Range (1.5 MHz up to 250 MHz)
Embedded Memory
1 kbit of FlashROM User Nonvolatile Memory
SRAMs and FIFOs with Variable-Aspect-Ratio 4,608-Bit† RAM Blocks (×1, ×2, ×4, ×9, and ×18 organizations)
True Dual-Port SRAM (except ×18)†
ARM Processor Support in IGLOO FPGAs
M1 IGLOO Devices—Cortex™-M1 Soft Processor Available with or without Debug

規格

以下是所選零件的基本參數，涉及零件的特性及其所屬類別。

Rohs Code	Yes	Part Life Cycle Code	Active
Reach Compliance Code	compliant	HTS Code !	8542.39.00.01
JESD-30 Code	S-PQFP-G100	JESD-609 Code	e3
Length	14 mm	Moisture Sensitivity Level	3
Number of Equivalent Gates	125000	Number of Inputs	71
Number of Logic Cells !	3072	Number of Outputs	71
Number of Terminals	100	Operating Temperature-Max	100 °C
Operating Temperature-Min	-40 °C	Organization	125000 GATES
Package Body Material	PLASTIC/EPOXY	Package Code	TFQFP
Package Equivalence Code	TQFP100,.63SQ	Package Shape	SQUARE
Package Style	FLATPACK, THIN PROFILE, FINE PITCH	Programmable Logic Type !	FIELD PROGRAMMABLE GATE ARRAY
Qualification Status !	Not Qualified	Seated Height-Max	1.2 mm
Supply Voltage-Max	1.575 V	Supply Voltage-Min	1.14 V
Supply Voltage-Nom	1.2 V	Surface Mount !	YES
Technology	CMOS	Temperature Grade !	INDUSTRIAL
Terminal Finish	TIN	Terminal Form !	GULL WING
Terminal Pitch !	0.5 mm	Terminal Position	QUAD
Width	14 mm